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교원에 대한 정보를 나타내는 표입니다.
성명	김병섭
소속	전자전기공학과
전화번호	279-2382
E-mail	byungsub@postech.ac.kr
Homepage	http://analog.postech.ac.kr/

학술지

국제전문학술지

Low-Power Small-Area Inverter-Based DSM for MEMS Microphone, IEEE Transactions on Circuits and Systems II: Express Briefs, , , - (2020)
Parallel Branching of Two 2-DIMM Sections With Write-Direction Impedance Matching for an 8-Drop 6.4-Gb/s SDRAM Interface, IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, , 9, 336-342 (2019)
A Simple Low-Cost Electric-Contact-Assisted Alignment Method for Die Stacking on an Interposer or a Printed Circuit Board, IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, , 9, 367-374 (2019)
Impact of Line Mismatch on Two-Wire Deembedding Methods in Early Characterization of Emerging Interconnects, IEEE Transactions on Components Packaging and Manufacturing Technology, , 9, 905-912 (2019)
A Quadrature RC Oscillator With Noise Reduction by Voltage Swing Control, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, , 66, 3077-3088 (2019)
An ultrasonic scanner to probe 3-D finger skin structures for biometric recognition, IEIE Transactions on Smart Processing and Computing, , 8, 161-169 (2019)
A Code Inversion Encoding Technique to Improve Read Margin of A Cross-Point Phase Change Memory, IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, , 27, 1811-1818 (2019)
Analog-digital Mixed-mode 10-tap Tomlinson-Harashima Precoding Equalizer for Single-ended High-speed Transmitter, JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, , 19, 461-469 (2019)
A Multilayer-Learning Current-Mode Neuromorphic System With Analog-Error Compensation, IEEE TRANSACTIONS ON BIOMEDICAL CIRCUITS AND SYSTEMS, , 13, 986-998 (2019)
A 192-pW Voltage Reference Generating Bandgap- V-th With Process and Temperature Dependence Compensation, IEEE JOURNAL OF SOLID-STATE CIRCUITS, , 54, 3281-3291 (2019)
A Time-Based Receiver With 2-Tap Decision Feedback Equalizer for Single-Ended Mobile DRAM Interface, IEEE JOURNAL OF SOLID-STATE CIRCUITS, , 53, 144-154 (2018)
An On-chip Learning Neuromorphic Autoencoder with Current-Mode Transposable Memory Read and Virtual Lookup Table, IEEE Transactions on Biomedical Circuits and Systems, , 12, 161-170 (2018)
An 84.6-dB-SNDR and 98.2-dB-SFDR Residue-Integrated SAR ADC for Low-Power Sensor Applications, IEEE JOURNAL OF SOLID-STATE CIRCUITS, , 53, 404-417 (2018)
Design of Digital CMOS Neuromorphic IC with Current-starved SRAM Synapse for Unsupervised Stochastic Learning, JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, , 18, 65-77 (2018)
An FFE Transmitter Which Automatically and Adaptively Relaxes Impedance Matching, IEEE JOURNAL OF SOLID-STATE CIRCUITS, , 53, 1780-1792 (2018)
An Approximate Closed-Form Transfer Function Model for Multiconductor Transmission Lines, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, , 65, 1199-1203 (2018)
A Study on Bandgap Reference Circuit With Leakage-Based PTAT Generation, IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, , 26, 2310-2321 (2018)
A Search Algorithm for the Worst Operation Scenario of a Cross-Point Phase-Change Memory Utilizing Particle Swarm Optimization, IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, , 26, 2591-2598 (2018)
A Phase-Interpolator based Fractional-Counter for All Digital Fractional-N Phase-Locked Loop, IEEE Transactions on Circuits and Systems-II, , 64, 249-253 (2017)
All-Synthesizable Current-Mode Transmitter Driver for USB2.0 interface, IEEE Transactions on Very Large Sale Integration SYSTEMs, , 25, - (2017)
A 250- μW 2.4-GHz Fast-Lock Fractional-N Frequency Generation for Ultralow-Power Applications, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, , 64, 106-110 (2017)
A Single-Chip 64-Channel Ultrasound RX-Beamformer Including Analog Front-End and LUT for Non-Uniform ADC-Sample-Clock Generation, IEEE TRANSACTIONS ON BIOMEDICAL CIRCUITS AND SYSTEMS, , 11, 87-97 (2017)
Automatic ReRAM SPICE Model Generation From Empirical Data for Fast ReRAM-Circuit Coevaluation, IEEE Transactions on Very Large Scale Integration Systems, , 25, 1821-1830 (2017)
Investigation on the Worst Read Scenario of a ReRAM Crossbar Array, IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, , 25, 2402-2410 (2017)
An Approximate Transfer Function Model of Two Serially Connected Heterogeneous Transmission Lines, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, , 64, 1067-1071 (2017)
A Self-Biased Current-Mode Amplifier with an Application to 10-bit Pipeline ADC, IEEE Transactions on Circuits and Systems I: Regular Papers, , 64, 1706-1717 (2017)
A Low-Power Wide Dynamic-Range Current Readout Circuit for Ion-Sensitive FET Sensors, IEEE Transactions on Biomedical Circuits and Systems, , 11, 523-533 (2017)
A Phase-Interpolator based Fractional-Counter for All Digital Fractional-N Phase-Locked Loop, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, , 61, 249-253 (2017)
All-Synthesizable Current-Mode Transmitter Driver for USB2.0 interface, EEE Transactions on Very Large Scale Integration (VLSI), , 25, 788-792 (2017)
A 250μW 2.4GHz Fast-Lock Fractional-N Frequency Generation for Ultra-Low-Power Applications, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, , 64, 106-110 (2017)
A Single-Chip 64-Channel Ultrasound RX-Beamformer Including Analog Front-End and an LUT for Non-Uniform ADC-Sample-Clock Generation, IEEE Transactions on Biomedical Circuits and Systems, , 11, 87-97 (2017)
An ECG monitoring system using android smart phone, 2016 IEEE International Conference on Consumer Electronics-Asia, ICCE-Asia 2016, , , - (2017)
A low-power LDO circuit with a fast load regulation, 2016 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2016, , , 47-49 (2017)
Read margin analysis in an ReRAM crossbar array, 2016 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2016, , , 473-475 (2017)
A Coefficient-Error-Robust Feed-Forward Equalizing Transmitter for Eye-Variation and Power Improvement, IEEE Journal of Solid-State Circuits, , 51, - (2016)
A Reconfigurable and Portable Highly Sensitive Biosensor Platform for ISFET and Enzyme-based Sensors, IEEE Sensors, , 16, 4443-4451 (2016)
A Single-Ended Parallel Transceiver With Four-Bit Four-Wire Four-Level Balanced Coding for the Point-to-Point DRAM Interface, IEEE JOURNAL OF SOLID-STATE CIRCUITS, , 51, 1890-1901 (2016)
A 40 mV-Differential-Channel-Swing Transceiver Using a RX Current-Integrating TIA and a TX Pre-Emphasis Equalizer With a CML Driver at 9 Gb/s, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS-I: Regular Papers, , , - (2016)
A 2 GHz Synthesized Fractional-N ADPLL With Dual-Referenced Interpolating TDC, IEEE JOURNAL OF SOLID-STATE CIRCUITS, , , - (2016)
A 0.65-to-10.5 Gb/s Reference-Less CDR With Asynchronous Baud-Rate Sampling for Frequency Acquisition and Adaptive Equalization, IEEE Transactions on Circuits and Systems-I: Regular Papers, , , - (2016)
A SNR-Enhanced Mutual-Capacitive Touch-Sensor ROIC Using an Averaging With Three Specific TX Frequencies, a Noise Memory, and a Compact Delay Compensation Circuit, IEEE Sensors, , 16, - (2016)
All-Synthesizable 5-Phase-Locked Loop for USB 2.0, Journal of Semiconductor Technology and Science, , 16, 352-358 (2016)
An Approximate Closed-Form Transfer Function Model for Diverse Differential Interconnects, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, , 62, 1335-1344 (2015)
A Single-Chip 32-Channel Analog Beamformer With 4-ns Delay Resolution and 768-ns Maximum Delay Range for Ultrasound Medical Imaging With a Linear Array Transducer, IEEE Transactions on Biomedical Circuits and Systems, , 9, 138-151 (2015)
EMI Issues in Pseudo-Differential Signaling for SDRAM Interface, JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, , 15, 455-462 (2015)
An Adaptive-Bandwidth Referenceless CDR with Small-area Coarse and Fine Frequency Detectors, JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, , 15, 404-416 (2015)
An In-Band Noise Filtering 32-tap FIR-Embedded Delta Sigma Digital Fractional-N PLL, JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, , 15, 342-348 (2015)
An OTA with Positive Feedback Bias Control for Power Adaptation Proportional to Analog Workloads, JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, , 15, 326-333 (2015)
Cost-Efficient and Automatic Large Volume Data Acquisition Method for On-Chip Random Process Variation Measurement, JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, , 15, 184-193 (2015)
An Adaptive Equalizer for High-Speed Receiver using a CDR-Assisted All-Digital Jitter Measurement, JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, , 15, 155-167 (2015)
Analytical Formulas for Tradeoff Among Channel Loss, Length, and Frequency of RC- and LC-Dominant Single-Ended Interconnects for Fast Equalized Link Tradeoff Estimation, IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, , 5, 1497-1506 (2015)
An LCD-VCOM-Noise Resilient Mutual-Capacitive Touch-Sensor IC Chip With a Low-Voltage Driving Signal, IEEE SENSORS JOURNAL, , 15, 4595-4602 (2015)
The Oscillation Frequency of CML-based Multipath Ring Oscillators, Journal of Semiconductor Technology and Science, , 15, 671-677 (2015)
A Single-Stage 37 dB-Linear Digitally-Controlled Variable Gain Amplifier for Ultrasound Medical Imaging, JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, , 14, 579-587 (2014)
A 40-mV-Swing Single-Ended Transceiver for TSV with a Switched-Diode RX Termination, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, , 61, 987-991 (2014)
A 0.5-V, 1.47-mu W 40-kS/s 13-bit SAR ADC With Capacitor Error Compensation, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, , 61, 840-844 (2014)
An 80 mV-Swing Single-Ended Duobinary Transceiver With a TIA RX Termination for the Point-to-Point DRAM Interface, IEEE JOURNAL OF SOLID-STATE CIRCUITS, , 49, 2618-2630 (2014)
An Approximate Closed-Form Channel Model for Diverse Interconnect Applications, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, , 61, 3034-3043 (2014)
Analysis of an Open-Loop Time Amplifier With a Time Gain Determined by the Ratio of Bias Current, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, , 61, 481-485 (2014)
Current-Mode Transceiver for Silicon Interposer Channel, IEEE JOURNAL OF SOLID-STATE CIRCUITS, , 49, 2044-2053 (2014)
Verilog Modeling of Transmission Line for USB 2.0 High-Speed PHY Interface, JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, , 14, 463-470 (2014)
An Analog-Digital Hybrid RX Beamformer Chip With Non-Uniform Sampling for Ultrasound Medical Imaging With 2D CMUT Array, IEEE TRANSACTIONS ON BIOMEDICAL CIRCUITS AND SYSTEMS, , 8, 799-809 (2014)
A 10-bit 25-MS/s 1.25-mW Pipelined ADC With a Semidigital Gm-Based Amplifier, IEEE Trans. on Circuits and Systems-II, , 60, 142-146 (2013)
A QDR-Based 6-GB/s Parallel Transceiver With Current-Regulated Voltage-Mode Output Driver and Byte CDR for Memory Interface, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, , 60, 91-95 (2013)
A 5 Gb/s Single-Ended Parallel Receiver With Adaptive Crosstalk-Induced Jitter Cancellation, IEEE Journal of Solid-State Circuits, , 48, 2118-2127 (2013)
A FIR-Embedded Phase Interpolator Based Noise Filtering for Wide-Bandwidth Fractional-N PLL, IEEE Journal of Solid-State Circuits, , 48, 2795-2804 (2013)
A Channel Model of Scaled RC-dominant Wires for High-Speed Wireline Transceiver Design, Journal of Semiconductor Technology and SCience, , 13, 482-491 (2013)
A 1.9-GHz Fractional-N Digital PLL With Subexponent Delta Sigma TDC and IIR-Based Noise Cancellation, IEEE Transaction on circuits and Systems II, , 59, 721-725 (2012)
An Energy-efficient Equalized Transceiver for RC-dominant Channels, IEEE JOURNAL OF SOLID-STATE CIRCUITS, , 45, 1186-1197 (2010)
A 10-Gb/s Compact Low-Power Serial I/O With DFE-IIR Equalization in 65-nm CMOS, IEEE JOURNAL OF SOLID-STATE CIRCUITS, , 44, 3526-3538 (2009)
Characterization of Equalized and Repeated Interconnects for NoC Applications, IEEE DESIGN & TEST OF COMPUTERS, , 25, 430-439 (2008)

국내전문학술지

일반학술지

An Integrated Potentiostat, IEEE Transactions on Circuits and Systems II: Express Briefs, , , - (2017)
An Integrated Potentiostat, IDEC Journal of Integrated Circuits and Systems, , , - (2017)
고속 System-in-Package 인터커넥트 기술 동향, IDEC Newsletter, , 192, 10-13 (2013)

학술회의논문

A 143nW Glucose-Monitoring Smart Contact Lens IC with a Dual-Mode Transmitter for Wireless-Powered Backscattering and RF-Radiated Transmission Using a Single Loop Antenna, A 143nW Glucose-Monitoring Smart Contact Lens IC with a Dual-Mode Transmitter for Wireless-Powered Backscattering and RF-Radiated Transmission Using a Single Loop Antenna, 0, 0, - (2019)
A 192pW Hybrid Bandgap-Vth Reference with Process Dependence Compensated by a Dimension-Induced Side-Effect, A 192pW Hybrid Bandgap-Vth Reference with Process Dependence Compensated by a Dimension-Induced Side-Effect, 0, 0, - (2019)
A Rule-of-thumb Condition to Avoid Large HRS Current in ReRAM Crossbar Array Design, A Rule-of-thumb Condition to Avoid Large HRS Current in ReRAM Crossbar Array Design, 0, 0, - (2018)
A 12-Gb/s AC-Coupled FFE TX With Adaptive Relaxed Impedance Matching Achieving Adaptation Range of 35-75Ω Z0 and 30-550Ω RRX, IEEE Asian Solid-State Circuits Conference Digest of Technical Papers Digest of Technical Papers, 0, 0, - (2018)
A 7.8Gb/s/pin 1.96pJ/b Compact Single-Ended TRX and CDR with Phase-Difference Modulation for Highly Reflective Memory Interfaces, IEEE INTERNATIONAL SOLID-STATE CIRCUITS CONFERENCE, 0, 0, - (2018)
A 16.6-pJ/b 150-Mb/s Body Channel Communication Transceiver with Decision Feedback Equalization Improving > 200x Area Efficiency, Proceedings of ACM Asia and Pacific Design Automation Conference (ASP-DAC), 0, 0, - (2018)
A 10-GHz Multi-purpose Reconfigurable Built-in Self-Test Circuit for High-Speed Links, IEEE Asian Solid-State Circuits Conference, 0, 0, - (2017)
A 16.6-pJ/b 150-Mb/s Body Channel Communication Transceiver with Decision Feedback Equalization Improving > 200x Area Efficiency, IEEE SYMPOSIUM ON VLSI CIRCUITS, 0, 0, - (2017)
An FFE TX with 3.8x Eye Improvement by Automatic Impedance Adaptation for Universal Compatibility With Arbitrary Channel and RX Impedances, IEEE SYMPOSIUM ON VLSI CIRCUITS, 0, 0, - (2017)
A Coefficient-Error-Robust FFE for a Silicon Interposer Channel, ., 0, 0, - (2017)
A Wide Range Delay Locked Loop for DDR4, ., 0, 0, - (2017)
A time-based receiver with 2-tap DFE for a 12Gb/s/pin single-ended transceiver of mobile DRAM interface in 0.8V 65nm CMOS, IEEE INTERNATIONAL SOLID-STATE CIRCUITS CONFERENCE, 0, 0, - (2017)
A 0.0047mm2 Highly Synthesizable TDC- and DCO-Less Fractional-N PLL with a Seamless Lock Range of fREF to 1GHz, IEEE INTERNATIONAL SOLID-STATE CIRCUITS CONFERENCE, 0, 0, - (2017)
A 9.3nW All-in-One Bandgap Voltage and Current Reference Circuit, IEEE INTERNATIONAL SOLID-STATE CIRCUITS CONFERENCE, 0, 0, - (2017)
A Quadrature Relaxation Oscillator with a Process-Induced Frequency-Error Compensation Loop, IEEE INTERNATIONAL SOLID-STATE CIRCUITS CONFERENCE, 0, 0, - (2017)
오디오용 쵸퍼 안정화 방식을 이용한 저잡음 증폭기, 대한전자전기공학회 추계종합학술대회, 0, 0, - (2016)
All Synthesizable 6Gb/s Voltage-Mode Transmitter for Serial Link, IEEE ASIAN SOLID-STATE CIRCUITS CONFERENCE, 0, 0, - (2016)
An ECG Monitoring System Using Android Smart Phone, IEEE INTERNATIONAL CONFERENCE ON CONSUMER ELECTRONICS-ASIA (ICCE-ASIA), 0, 0, - (2016)
All Synthesizable Transmitter Driver and Data Recovery Circuit for USB 2.0 Interface, IEEE INTERNATIONAL SOC DESIGN CONFERENCE, 0, 0, - (2016)
A Low-Power LDO Circuit With A Fast Load Regulation, IEEE ASIA PACIFIC CONFERENCE ON CIRCUITS AND SYSTEMS, 0, 0, - (2016)
시리얼 링크를 위한 디지털 합성화 된 다중 위상고정루프, ., 0, 0, - (2016)
Full-speed USB PHY_LINK 소자와 델타-모듈레이터 ADC를 이용한 안드로이드 스마트폰용 오실로스코프, ., 0, 0, - (2016)
A Low-EMI Four-Bit Four-Wire Single-Ended DRAM Interface by Using A Three-Level Balanced Coding Scheme, IEEE SYMPOSIA ON VLSI TECHNOLOGY AND CIRCUITS, 0, 0, - (2016)
All Synthesizable Current-Mode Transmitter Driver for Serial Link Interface, 18TH INTERNATIONAL CONFERENCE ON ELECTRONICS, INFORMATION AND COMMUNICATION (ICEIC), 0, 0, - (2016)
All-Synthesizable 5-Phase Phase-Locked Loop, 18TH INTERNATIONAL CONFERENCE ON ELECTRONICS, INFORMATION AND COMMUNICATION (ICEIC), 0, 0, - (2016)
A Threshold Voltage Variation Calibration Algorithm for An ISFET-Based Low-Cost pH Sensor System, IEEE SENSORS, 0, 0, - (2015)
An Approximate Condition to Avoid Reverse Leakage Current in ReRAM Crossbar Design, IEEE INTERNATIONAL SOC DESIGN CONFERENCE, 0, 0, - (2015)
A Sample Reduction Technique by Aliasing Channel Response for Fast Equalizing Transceiver Design, IEEE/ACM INTERNATIONAL COMPUTER-AIDED DESIGN CONFERENCE, 0, 0, - (2015)
A reduced-size look-up-table for ADC sample-times of a single-chip non-uniform-sampling digital-beamformer for ultrasound medical imaging, IEEE INTERNATIONAL SOC DESIGN CONFERENCE, 0, 0, - (2015)
A Mutual-Capacitive Touch Sensor ROIC Using a PLL to Reduce LCD Noise by Synchronizing ROIC TX Clock to LCD Clock, IEEE SENSORS, 0, 0, - (2015)
An FPGA-Based Embedded System for Portable and Cost-Efficient Bio-sensing: A Low-Cost Controller for Biomedical Diagnosis, IEEE INTERNATIONAL CIRCUITS AND SYSTEMS SYMPOSIUM, 0, 0, - (2015)
An Input Pole Tuned Switching Equalization Scheme for High-Speed Serial Links, IEEE MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS, 0, 0, - (2015)
A 35dB-Linear Variable Gain Amplifier Circuit of Digital-Beamformer for Ultrasound Medical Imaging, 30TH INTERNATIONAL TECHNICAL CONFERENCE ON CIRCUITS SYSTEMS, COMPUTERS AND COMMUNICATIONS (ITC-CSCC), 0, 0, - (2015)
High-speed USB 2.0 device 용 Link 및 Data Acquisition System, ., 0, 0, - (2015)
Comprehensive Methodology for ReRAM and Selector Design Guideline of Cross-Point Array, IEEE INTERNATIONAL MEMORY WORKSHOP, 0, 0, - (2015)
A 29-nW bandgap reference circuit, IEEE INTERNATIONAL SOLID-STATE CIRCUITS CONFERENCE, 0, 0, - (2015)
EMI issues in pseudo-differential signaling for SDRAM interface, ., 0, 0, - (2015)
A Voltage-Scalable 10-b Pipelined ADC with Current- Mode Amplifier, PROCEEDINGS OF THE CUSTOM INTEGRATED CIRCUITS CONFERENCE (CICC), 0, 0, - (2014)
A 0.4 V Driving Multi-Touch Capacitive Sensor with the Driving Signal Frequency set to (n+0.5) Times the Inverse of the LCD VCOM Noise Period, IEEE 2014 ISCAS, 0, 0, - (2014)
An analog-digital-hybrid single-chip RX beamformer with non-uniform sampling for 2D-CMUT ultrasound imaging to achieve wide dynamic range of delay and small chip area, IEEE INTERNATIONAL SOLID-STATE CIRCUITS CONFERENCE DIGEST OF TECHNICAL PAPERS, 0, 0, 426-427 (2014)
A 5.67mW 9Gb/s DLL-based reference-less CDR with pattern-dependent clock-embedded signaling for intra-panel interface, INTERNATIONAL SOLID-STATE CIRCUITS CONFERENCE DIGEST OF TECHNICAL PAPERS, 0, 0, - (2014)
A coefficient-error-robust FFE TX with 230% eye-variation improvement without calibration in 65nm CMOS technology, IEEE INTERNATIONAL SOLID-STATE CIRCUITS CONFERENCE DIGEST OF TECHNICAL PAPERS, 0, 0, 50-51 (2014)
Full-speed USB 2.0 device용 Link및 Application Layer 칩, 대한전자전기공학회 추계종합학술대회, 0, 0, - (2013)
All-digital USB 2.0 device Full-speed PHY 칩, 대한전자공학회 하계학술대회, 0, 0, - (2013)
RC-dominant 채널의 간단한 전달함수 모델을 이용한 RC-dominant 인터커넥트 길이와 손실의 Trade-off 분석, 대한전자공학회, 0, 0, - (2013)
Micro-second 레벨의 지연시간을 가지는 Voltage Controlled Delay Line, 2012년도 대한전자공학회 하계학술대회 제 35권 1호, 0, 0, - (2012)
An analytical model of scaled RC-dominant wires for high-speed wireline transceiver design, PROCEEDINGS OF INTERNATIONAL MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS, 0, 0, - (2011)
Designing Energy-efficient Low-Diameter On-chip Networks with Equalized Interconnects, PROCEEDINGS OF HIGH PERFORMANCE INTERCONNECTS, 0, 0, - (2009)
A Fractionally Spaced Linear Receive Equalizer with Voltage-to-Time Conversion, IEEE INTERNATINOAL SYMPOSIUM ON VLSI CIRCUITS DIGEST OF TECHNICAL PAPERS, 0, 0, - (2009)
A 10Gb/s Compact Low-Power Serial I/O with DFE-IIR Equalization in 65nm CMOS, IEEE INTERNATIONAL SOLID-STATE CIRCUITS CONFERENCE DIGEST OF TECHNICAL PAPERS, 0, 0, - (2009)
A 4Gb/s/ch 356fJ/b 10mm Equalized On-chip Interconnect with Nonlinear Charge-Injecting Transmit Filter and Transimpedance Receiver in 90nm CMOS Technology, IEEE INTERNAL SOLID-STATE CIRCUITS CONFERENCE DIGEST OF TECHNICAL PAPERS, 0, 0, - (2009)
Equalized Interconnect for On-chip Network: Modeling and Optimization Framework, PROCEEDINGS OF IEEE/ACM INTERNATIONAL CONFERENCE ON COMPUTER-AIDED DESIGN, 0, 0, - (2007)
Power-Adaptive Operational Amplifier with Positive Feedback Self-Biasing, PROCEEDINGS OF IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, 0, 0, - (2006)

학회발표

USB2.0 용 All-synthesizable 저 전력 전압모드 송신기 구동회로, 대한전자공학회 2018 정기총회 및 추계학술대회, 0, 0, - (2018)
안드로이드 스마트폰용 텐서플로우 모바일 라이브러리와 Bidirectional LSTM을 이용한 On-Device 자동음성인식 어플리케이션, 안드로이드 스마트폰용 텐서플로우 모바일 라이브러리와 Bidirectional LSTM을 이용한 On-Device 자동음성인식 어플리케이션, 0, 0, - (2018)
A 0.3-to-1.2V Frequency-Scalable Fractional-N ADPLLwith a Speculative Dual-Referenced Interpolating TDC, EEE International Solid-State Circuits Conference (ISSCC), 0, 0, - (2018)
A Low-Power Wide Dynamic-Range Current Readout Circuit for Biosensors, ASP-DAC, 0, 0, - (2018)
A 9.3 nW All-in-One Bandgap Voltage and Current Reference Circuitusing Leakage-based PTAT Generation and DIBL Characteristic, ASP-DAC, 0, 0, - (2018)
A Theory and Practice To Overcome 50-Ω Legacy in High-Speed Link Applications, Proceedings of ISOCC, 0, 0, - (2017)
An FFE TX with 3.8x Eye Improvement by Automatic Impedance Adaptation for Universal Compatibility with Arbitrary Channel and RX Impedances, Symp. on VLSI Cir. (VLSIC), 0, 0, - (2017)
A 16.6-pJ/b 150-Mb/s Body Channel Communication Transceiver with Decision Feedback Equalization Improving 200% Area Efficiency, Symposium on VLSI Circuits (VLSIC), 0, 0, - (2017)
A Coefficient-Error-Robust FFE TX with 230% Eye Variation Improvement Without Calibration in 65-nm CMOS Technology, IEEE CAS SOCIETY KOREAN WORKSHOP ON CIRCUITS AND SYSTEMS, 0, 0, - (2017)
A 0.0047mm2 Highly Synthesizable TDC and DCO-less Fractional-NPLL with a Seamless Lock - Range off RER to 1GHz, IEEE International Solid-State Circuits Conference (ISSCC), 0, 0, - (2017)
A Quadrature Relaxation Oscillator with a Process-Induced Frequency-Error Compensation Loop, IEEE International Solid-State Circuits Conference (ISSCC), 0, 0, - (2017)
A 9.3nW All-in-One Bandgap Voltage and Current Reference Circuit, IEEE International Solid-State Circuits Conference (ISSCC), 0, 0, - (2017)
A Time-Based Receiver with 2-tap DFE for a 12Gb/s/pin Single-EndedTransceiver of Mobile DRAM Interface in 0.8V 65nm CMOS, IEEE International Solid-State Circuits Conference (ISSCC), 0, 0, 400-402 (2017)
Read Margin Analysis in an ReRAM Crossbar Array, ., 0, 0, - (2016)
Hierarchical Design Automation for Electronics, EDA SUMMER WORKSHOP, 0, 0, - (2015)
An Energy-Efficient Equalized Transceiver for RC-dominant Channels, POSTECH-NTU SILICON INTERPOSER WORKSHOP, 0, 0, - (2015)
DFE-IIR Equalization, POSTECH-NTU SILICON INTERPOSER WORKSHOP, 0, 0, - (2015)
A Coefficient-Error-Robust FFE TX with 230% Eye-Variation Improvement Without Calibration in 65nm CMOS Technology, CMOS EMERGING TECHNOLOGY RESEARCH, 0, 0, - (2014)
수신 단 TIA 터미네이션 기법의 단일 신호선 듀오바이너리 송수신 단 회로, ., 0, 0, - (2014)
LCD VCOM Noise 주파수 (n+0.5) 배의 주파수를 인가 신호 주파수로 이용하는 다중 정전용량 터치 센서, ., 0, 0, - (2014)
오픈루프 시간차이 증폭기를 이용한 고해상도 Time-to-Digital Converter, ., 0, 0, - (2014)
USB 2.0 high-speed PHY interface를 위한 전송선의 Verilog modeling, ., 0, 0, - (2014)
CMOS 이미지 센서 인터페이스용 Gb/s SerDes, ., 0, 0, - (2014)
An Experimental Verification of A Scaled RC-dominant Interconnect Line Model of High-speed Wireline, ., 0, 0, - (2014)
A Single-Stage 40dB-Linear Digitally-Controlled Variable Gain Amplifier for Ultrasound Analog Front End, ., 0, 0, - (2014)
A Winner-Take-All Neuromorphic IC in 65nm CMOS, ., 0, 0, - (2014)
Verilog Synthesis of USB 2.0 Full-speed Device PHY IP, ., 0, 0, - (2013)
A Power Reduction of 37% in a Differential Serial Link Transceiver by Increasing the Termination Resistance, ., 0, 0, - (2013)
Revisiting High-Speed Interconnect Channel Modeling, ., 0, 0, - (2013)
Design Automation Techniques for High-Speed Interconnects, ., 0, 0, - (2013)
High slew-rate 1.2V Class-AB OTA, ., 0, 0, - (2013)
A Neuromorphic IC with Spike-Timing-Dependent-Plasticity, ., 0, 0, - (2013)
A Winner-Take-All Neuromorphic IC in 65nm CMOS, ., 0, 0, - (2013)
A Neuromorphic IC with Spike-Timing-Dependent-Plasticity, ., 0, 0, - (2013)
A spread Spectrum Clock Generator Using Phase/Frequency Boosting with a Peak Power Reduction 14.6dB, RMS Jitter 1.45ps and Power 4.8mW/GHz for USB 3.0, ., 0, 0, - (2012)
실리콘 인터포저 인터커넥트 연구동향, ., 0, 0, - (2012)
NCO용 Pulse Width Modulator 회로, ., 0, 0, - (2012)
Future State-of-the-Art Electrical Interconnect, ., 0, 0, - (2010)
Energy Efficient Wireline Communication Over RC-dominant Channels, ., 0, 0, - (2009)

단행본

연구실적

생체-화학-전기 검출기 개발을 위한 다 학제간 교류 및 공동 연구 기획, 포항공과대학교 (2012-2013)
NANO소자의 불확실성에 영향을 적게 받는 인터커넥트 연구, 포항공과대학교 (2012-2013)
실리콘 인터포저와 칩 적층 기법을 이용한 3D IC SIP용 차세대 저전력 초고속 인터커넥트 회로 및 융합설계에 관한 포괄적 연구, 재단법인한국연구재단 (2012-2013)
학부생연구프로그램-김도윤(전자)-계수에러에 강력한 트랜스미트 피드 포워드 이궐라이제이션 분석, 포항공과대학교 (2012-2012)
POSTECH-삼성전자 RERAM 클러스터 연구과제(김병섭), 삼성전자(주) (2012-2013)
NANO소자의 불확실성에 영향을 적게 받는 인터커넥트 연구, 포항공과대학교 (2013-2014)
신규부임교수 기자재지원비(학과부담), 포항공과대학교 (2013-2014)
학생인건비통합관리과제, 포항공대산학협력단 (2013-2040)
4.8350_1차년도 이월과제, 재단법인한국연구재단 (2013-2014)
실리콘 인터포저와 칩 적층 기법을 이용한 3D IC SIP용 차세대 저전력 초고속 인터커넥트 회로 및 융합설계에 관한 포괄적 연구, 재단법인한국연구재단 (2013-2014)
비침습형 유연바이오 센서구동 방법 개발/ 검증 및 시스템 초소형화 기술개발, 한국과학기술연구원 (2013-2013)
콘택트렌즈형 지속/자가구동 헬스 모니터링 플랫폼 기술 개발, 한국과학기술연구원 (2014-2014)
NANO소자의 불확실성에 영향을 적게 받는 인터커넥트 연구(대학부담), 포항공대산학협력단 (2014-2015)
신규부임교수 기자재지원비(대학부담), 포항공대산학협력단 (2014-2015)
신규부임교수 기자재지원비(학과부담), 포항공과대학교 (2014-2015)
연구개발과제, 포항공과대학교 (2014-2025)
인건비풀링과제, 포항공대산학협력단 (2014-2015)
POSTECH-삼성전자 RERAM 클러스터 연구과제(2차년도), 삼성전자(주) (2013-2014)
실리콘 인터포저와 칩 적층 기법을 이용한 3D IC SIP용 차세대 저전, 재단법인한국연구재단 (2014-2015)
4.9711/9752_2차년도 이월과제, 재단법인한국연구재단 (2014-2015)
포스텍-난양공대 실리콘 인터포저 인터커넥트 협력 연구 및 교류 프로그램, 재단법인한국연구재단 (2014-2015)
POSTECH-삼성전자 RERAM 클러스터 연구과제(3차년도), 삼성전자(주) (2014-2015)
저전력 바이오센서 구동회로 개발, 한국과학기술연구원 (2015-2015)
실리콘 인터포저와 칩 적층 기법을 이용한 3D IC SIP용 차세대 저전력 초고속 인터커넥트 회로 및 융합설계에 관한 포괄적 연구, 재단법인한국연구재단 (2015-2016)
연구개발과제[2015년 신설], 포항공과대학교 (2015-2044)
저전력 바이오 센서 구동회로 개발, 한국과학기술연구원 (2015-2016)
코딩기법을 이용한 저항성 CROSS-POINT ARRAY 메모리의 성능 개선 연구, 에스케이하이닉스 주식회사 (2015-2016)
포스텍-난양공대 실리콘 인터포저 인터커넥트 협력 연구 및 교류 프로그램, 재단법인한국연구재단 (2015-2016)
4.11544 이월과제, 재단법인한국연구재단 (2015-2016)
실리콘 인터포저와 칩 적층 기법을 이용한 3D IC SIP용 차세대 저전력 초고속 인터커넥트 회로 및 융합설계에 관한 포괄적 연구, 재단법인한국연구재단 (2016-2017)
저전력 바이오 센서 구동회로 개발, 한국과학기술연구원 (2016-2017)
4.12343_이월과제, 재단법인한국연구재단 (2016-2017)
실리콘 인터포저와 칩 적층 기법을 이용한 3D IC SIP용 차세대 저전력 초고속 인터커넥트 회로 및 융합설계에 관한 포괄적 연구, 재단법인한국연구재단 (2017-2018)
저전력 바이오 센서 구동회로 개발, 한국과학기술연구원 (2017-2018)
4.13445/13868_이월과제, 재단법인한국연구재단 (2017-2018)
실리콘 인터포저를 이용한 다목적 단일 패키지 나노-바이오센서 시스템, 재단법인한국연구재단 (2018-2019)
실시간 고해상도 IN-VIVO IMAGING을 위한 초고속 체내데이터 전송기술 연구실, 재단법인한국연구재단 (2018-2019)
기초연구실지원사업 부서운영비, 포항공대산학협력단 (2018-2023)
실리콘 인터포저를 이용한 다목적 단일 패키지 나노-바이오센서 시스템, 재단법인한국연구재단 (2019-2020)
실시간 고해상도 IN-VIVO IMAGING을 위한 초고속 체내데이터 전송기술 연구실, 재단법인한국연구재단 (2019-2020)
지능형 반도체를 지원하기 위한 초고속 I/O회로의 자동생성 기술 개발, 정보통신기획평가원 (2019-2019)
4.16452 이월과제, 재단법인한국연구재단 (2019-2020)
4.16652 이월과제, 재단법인한국연구재단 (2019-2020)
지능형 반도체를 지원하기 위한 초고속 I/O회로의 자동생성 기술 개발, 정보통신기획평가원 (2020-2020)
실시간 고해상도 IN-VIVO IMAGING을 위한 초고속 체내데이터 전송기술 연구실, 재단법인한국연구재단 (2020-2021)
실리콘 인터포저를 이용한 다목적 단일 패키지 나노-바이오센서 시스템, 재단법인한국연구재단 (2020-2021)
4.18140 이월과제, 정보통신기획평가원 (2020-2020)
4.17545/18512 이월과제, 재단법인한국연구재단 (2020-2021)
4.17489/18510 이월과제, 재단법인한국연구재단 (2020-2021)
지능형 반도체를 지원하기 위한 초고속 I/O회로의 자동생성 기술 개발, 정보통신기획평가원 (2021-2021)
반도체 아날로그 IP 자동생성 기술사업화 기획 중개연구단, (재)과학기술사업화진흥원 (2021-2021)
4.0019206/4.0020075_이월과제, 정보통신기획평가원 (2021-2021)
디지털 신기술 인재양성 혁신공유대학사업(차세대반도체), 재단법인한국연구재단 (2021-2022)
ANALOG LAYOUT SW 고도화 및 RCD 실용화 지원 연구, (재)과학기술사업화진흥원 (2021-2021)
차세대 반도체 혁신공유대학 사업단 부서운영비, 포항공대산학협력단 (2021-2027)
ANALOG LAYOUT SW 고도화 및 RCD 실용화 지원 연구, (재)과학기술사업화진흥원 (2022-2022)
4.0022770_이월과제, 재단법인한국연구재단 (2022-2023)
디지털 신기술 인재양성 혁신공유대학사업(차세대반도체), 재단법인한국연구재단 (2022-2023)
차세대 반도체 혁신공유대학 사업단 부서연구관리비, 포항공과대학교 (2022-2024)
4.22835_이월과제, (재)과학기술사업화진흥원 (2022-2022)
PIM 고속 데이터 송수신을 위한 지능형 PHY 인터페이스 기술 개발, 정보통신기획평가원 (2022-2022)
고속 반도체 입출력 수신기 설계기술, 재단법인한국연구재단 (2022-2022)
PIM 고속 데이터 송수신을 위한 지능형 PHY 인터페이스 기술 개발, 정보통신기획평가원 (2023-2023)
S_직접비_김병섭, 포항공과대학교 (2023-2024)
S_간접비_김병섭, 포항공과대학교 (2023-2024)
4.0024144_이월과제, 재단법인한국연구재단 (2023-2024)
4.23309/24310_이월과제, (재)과학기술사업화진흥원 (2023-2023)
디지털 신기술 인재양성 혁신공유대학사업(차세대반도체), 재단법인한국연구재단 (2023-2024)
S_직접비_김병섭, 포항공과대학교 (2023-2024)
S_간접비_김병섭, 포항공과대학교 (2023-2024)
4.0024552_이월과제, 정보통신기획평가원 (2023-2023)
ANALOG LAYOUT SW 고도화 및 RCD 실용화 지원 연구, (재)과학기술사업화진흥원 (2023-2023)
4.0022770_이자과제, 재단법인한국연구재단 (2021-2022)
10GBS 급 고속 반도체 입출력 회로 설계 기술, 재단법인한국연구재단 (2023-2023)

IP

김광민,김병섭, 고속 송신기의 아이 사이즈 및 전력 소모량을 빠르게 자동으로 평가하는 소프트웨어, 한국, C-2022-052322 (PR20)
한승호,김병섭,정순규, pLay를 사용한 FFE SST 송신기 레이아웃 생성기 (A generator of a FFE SST TX using pLay), 한국, C-2021-024694 (PR20)
한승호,김병섭,정순규, pLay: 파라미터 변수화된 레이아웃 자동 생성기 (pLay: parameterized layout generator), 한국, C-2021-024693 (PR20)
김병섭,서재영, 데이터 내장형 클럭 송수신기 및 이를 포함하는 시스템, 중국, 202310180148.7 (2023)
김병섭,서재영, 데이터 내장형 클럭 송수신기 및 이를 포함하는 시스템, USA, 18/163,559 (2023)
김병섭,문창재, 피드 포워드 등화기 및 이를 포함하는 시스템, 중국, 202310519852.0 (2023)
김병섭,문창재, 피드 포워드 등화기 및 이를 포함하는 시스템, USA, 18/144,331 (2023)
김병섭,문창재, 피드 포워드 등화기 및 이를 포함하는 시스템, 한국, 10-2022-0108990 (2022)
김병섭,한창윤, 반사 신호 상쇄를 활용한 멀티 드롭 채널 설계 기술, 한국, 10-2022-0117442 (2022)
김병섭,정순규, 반도체 설계 프로그램의 사용자 인터페이스 방법 및 연산 장치, 한국, 10-2023-0058395 (2022)
김병섭,정순규, 반도체 레이아웃의 제너레이터 할당 방법, 할당 학습 방법 및 연산 장치, 한국, 10-2023-0058398 (2022)
김병섭,서재영, 데이터 내장형 클럭 송수신기 및 이를 포함하는 시스템, 한국, 10-2022-0105543 (2022)
김병섭,문창재, 인버터 드라이버를 이용한 탭간의 덧셈만 사용하는 피드포워드 등화기, 한국, 10-2022-0057392 (2022)
김병섭,서재영, 근거리 메모리 인터페이스를 위한 듀티 사이클 교정 회로와 클락 및 데이터 복구 회로가 없는 데이터 내장형 신호 송수신기, 한국, 10-2022-0021574 (2022)
김병섭,이수은, 고반사 인터커넥트를 위한 위상차 변조 송수신기 및 클럭 복구회로, USA, 16/413,212 (2020)
김병섭,이수은, 신호 반사가 심한 인터커넥트를 위한 고효율 위상 차 변조 송수신기와 클락 복구 회로, USA, 16/413,212 (2020)
김병섭,이수은, 신호 반사가 심한 인터커넥트를 위한 고효율 위상 차 변조 송수신기와 클락 복구 회로, 한국, 10-2019-0016843 (2019)
김병섭,최민수, 완화된 임피던스 매칭을 제공하는 송신 장치 및 수신 장치, USA, 16/235,053 (2018)
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